Common shift register characteristics
INPUT serial or parallel: in Carr figure 11-4 mentions how to parallel load data.
OUTPUT serial or parallel
Synchronous or Asynchronous (Jam) Clears and Sets (or Resets): see figure 11-3 Carr.
Applications of Shift Registers
Conversion of parallel to/from serial data
Gating that involves prior values
Detection of sequence: requires memory of previous state(s)