Project Info

Area selective atomic layer deposition for semiconductor device manufacturing

Sumit Agarwal | sagarwal@mines.edu

In 1965, Gordon E. Moore predicted that the number of components in semiconductor chips would double every 2 years for the next decade. This prediction, commonly referred to as the Moore’s law, was adopted by the semiconductor industry as a “roadmap” for research and development for high-volume production. For more than 50 years, this roadmap has been enabled in large part by a processing technique called photolithography. This conventional patterning top-down technique becomes increasingly challenging due to the increasing alignment requirements when the device dimensions are down to 5 nm. Therefore, bottom-up approaches, which eliminate the need for optical pattering, are attracting great interest and are expected to play an increasingly important role in semiconductor device fabrication. Selective deposition, a bottom-up technique, can meet these challenges and the requirements of future generation devices. Amongst the various deposition techniques used in semiconductor device fabrication, selective growth using atomic layer deposition is considered the most promising. In this project, we will be working with one of the largest specialty chemicals company and one of the largest tool manufacturers for the semiconductor industry to address the challenges with area-selective material growth. What makes this project really interesting is that it takes a basic science approach, while addressing an immediate technological need in the semiconductor industry.

More Information

Towards Area-Selective Atomic Layer Deposition with High Selectivity – Our perspective on area-selective ALD

Grand Engineering Challenge: Not applicable